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Chapter 2 code sample fixes
These fixes get code samples to compile without warnings. Other changes
include:
* Fix the SysTick code snippet on the "Memory Mapped Registers" page so
that it:
* Compiles without errors/warnings.
* Sets up the SysTick peripheral correctly for counting down 1000
ticks.
* Added a reminder in the "Semihosting" section about how to enable
semihosting in openOCD.
This commit is contained in:
@@ -81,7 +81,7 @@ use cortex_m_rt::entry;
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fn main() -> ! {
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let xs = [0, 1, 2];
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let i = xs.len() + 1;
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let y = xs[i]; // out of bounds access
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let _y = xs[i]; // out of bounds access
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loop {}
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}
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@@ -26,15 +26,18 @@ use cortex_m::peripheral::{syst, Peripherals};
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use cortex_m_rt::entry;
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#[entry]
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fn main() {
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fn main() -> ! {
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let mut peripherals = Peripherals::take().unwrap();
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let mut systick = peripherals.SYST;
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systick.set_clock_source(syst::SystClkSource::Core);
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systick.set_reload(1_000);
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systick.clear_current();
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systick.enable_counter();
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while systick.get_current() < 1_000 {
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while !systick.has_wrapped() {
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// Loop
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}
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loop {}
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}
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```
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@@ -18,8 +18,6 @@ world!":
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extern crate panic_halt;
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use core::fmt::Write;
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use cortex_m_rt::entry;
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use cortex_m_semihosting::hprintln;
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@@ -41,6 +39,12 @@ Hello, world!
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(..)
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```
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You do need to enable semihosting in OpenOCD from GDB first:
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``` console
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(gdb) monitor arm semihosting enable
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semihosting is enabled
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```
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QEMU understands semihosting operations so the above program will also work with
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`qemu-system-arm` without having to start a debug session. Note that you'll
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need to pass the `-semihosting-config` flag to QEMU to enable semihosting
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