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Fix for complex situations where directories are declared as prerequisites.
Info on this fix from barkalow@reputation.com: thanks! Some updates/cleanups of some of the tests; added a forgotten -t test, etc.
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@@ -999,13 +999,25 @@ Defining a variable from a verbatim string containing multiple lines
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@cindex comments, in makefile
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@cindex @code{#} (comments), in makefile
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@item
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@samp{#} in a line of a makefile starts a @dfn{comment}. It and the rest of
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the line are ignored, except that a trailing backslash not escaped by
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another backslash will continue the comment across multiple lines.
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Comments may appear on any of the lines in the makefile, except within a
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@code{define} directive, and perhaps within commands (where the shell
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decides what is a comment). A line containing just a comment (with
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perhaps spaces before it) is effectively blank, and is ignored.@refill
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@samp{#} in a line of a makefile starts a @dfn{comment}. It and the
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rest of the line are ignored, except that a trailing backslash not
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escaped by another backslash will continue the comment across multiple
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lines. A line containing just a comment (with perhaps spaces before
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it) is effectively blank, and is ignored. If you want a literal
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@code{#}, escape it with a backslash (e.g., @code{\#}). Comments may
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appear on any line in the makefile, although they are treated
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specially in certain situations.
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Within a command script (if the line begins with a TAB character) the
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entire line is passed to the shell, just as with any other line that
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begins with a TAB. The shell decides how to interpret the text:
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whether or not this is a comment is up to the shell.
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Within a @code{define} directive, comments are not ignored during the
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definition of the variable, but rather kept intact in the value of the
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variable. When the variable is expanded they will either be treated
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as @code{make} comments or as command script text, depending on the
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context in which the variable is evaluated.
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@end itemize
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@node Makefile Names, Include, Makefile Contents, Makefiles
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@@ -2322,10 +2334,11 @@ clean:
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@end example
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Another example of the usefulness of phony targets is in conjunction
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with recursive invocations of @code{make}. In this case the makefile
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will often contain a variable which lists a number of subdirectories to
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be built. One way to handle this is with one rule whose command is a
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shell loop over the subdirectories, like this:
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with recursive invocations of @code{make} (for more information, see
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@ref{Recursion, ,Recursive Use of @code{make}}). In this case the
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makefile will often contain a variable which lists a number of
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subdirectories to be built. One way to handle this is with one rule
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whose command is a shell loop over the subdirectories, like this:
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@example
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@group
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@@ -3597,7 +3610,10 @@ subsystem:
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You can write recursive @code{make} commands just by copying this example,
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but there are many things to know about how they work and why, and about
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how the sub-@code{make} relates to the top-level @code{make}.
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how the sub-@code{make} relates to the top-level @code{make}. You may
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also find it useful to declare targets that invoke recursive
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@code{make} commands as @samp{.PHONY} (for more discussion on when
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this is useful, see @ref{Phony Targets}).
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For your convenience, GNU @code{make} sets the variable @code{CURDIR} to
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the pathname of the current working directory for you. If @code{-C} is
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